WEBINAR: Simple Layout Steps for Maximizing GaN Design Performance

Higher system efficiency and power density are enabled by the ultra-low switching energy consumption of GaN HEMTs.

With Lucas Lu, Global AE Manager at GaN Systems Inc.

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In this webinar, you will:

  • REVIEW

    Review the design theories and implementations the power semiconductor industry has learned and perfected over the past decade

  • LEARN

    Learn the key points to designing high-efficiency and reliable GaN-based systems

  • Examine

    Examine the most common mistakes first-time designers make in GaN power layout

  • Discover

    Discover the design rules and basic steps to avoid design errors that most often occur such as: oscillation, additional loss, poor EMI, parasitic turn-on/turn-off, device over stress or hard failure during switching transitions

Questions and Answers

We do not prefer film capacitors. Ceramic capacitors are usually preferred for decoupling compared to film capacitors because of their smaller package, which introduces less stray inductance to the power commutation loops.

The test boards are designed for pulse test only. In double pulse tests, very little heat less than 1mJ  is generated, so we did not apply a heatsink. For practical use, the need for a heatsink should be evaluated. In many cases, customers use the GaN solution because the heat sink can be eliminated.

Yes, there will be some parasitic capacitance between the top layer and the first middle layer. In practical design, we minimize the area of the switching node to reduce the parasitic capacitance between the drain and the source, and to avoid capacitance between the drain and the gate.

Although there is no body diode in a GaN HEMT, a GaN HEMT does freewheel current during the deadtime. In reverse conduction mode with Vgs < Vth, the Drain of the GaN will behave as a source, while the source will behave as a drain. When Vgs>Vth, the GaN device will be fully turned on like a Si MOSFET. Please refer to page 5 of our application note GN001 for more information.

Usually, the smaller the package the smaller the inductance. So we choose 0603 in our designs.

Yes. As we have seen Si MOSFETs in this application. A GaN circuit should have higher performance since the GaN does not have reverse recovery and operates with a much faster switching transition.

Usually, a Cgs is not needed. However, a Cgs can help filter some noise on Vgs, if the layout is not optimum. So, it may be good to have a footprint for Cgs, and then, after testing, determine if it should be populated.

We use the bottom layer of the driver board to do flux cancellation with the single layer of the aluminum PCB. If you have IEEE access, refer to this link for more information:  https://ieeexplore.ieee.org/document/8096647

We recommend 2220 package, 650V, 0.2-1.0uF ceramic capacitors for decoupling.

Yes, GaN is quite easy to parallel. We have reference designs with 2 and 4 GaN HEMTs in parallel. The only difference versus a single GaN device applications is that, for paralleled GaN, we need to make sure the power commutation loop for each paralleled transistor is minimized and symmetric. Refer to the application note GN004 for more information:

Yes. For example, the common source inductance will slow down the switching transition or even cause false triggering so as to affect the switching loss. Also the power commutation loop inductance will increase the voltage overshoot on Vds, which will also affect the switching loss. Generally speaking, minimizing parasitic inductance minimizes system loss.

The maximum transient voltage  less than 1uS  for our GaN is 750V. So, as long as the voltage spike is less than 650V, there is no concern.  In practical designs, we’ve seen 550V bus-voltage systems using 650V GaN HEMTs without issue. For 100V, the design rule is the same, ensure the peak Vds (greater than) 100V.

For GS66516T, the junction to heatsink thermal resistance is about 2°C/W.

The fastest switching transition is achieved in the Lidar application: the device current increases from 0 to 250A within 1.7nS.

GaN Systems is continuously working on new product developments. Please keep watching this information on new products.

Although there are no body diodes in GaN HEMTs, GaN HEMTs  freewheel current during the deadtime.  In reverse conduction mode with Vgs < Vth, the drain of the GaN will behave as a source, while the source will behave as a drain. When Vgs>Vth, the GaN will be fully turned on like a Si MOSFET. Please refer to the page 5 of GN001 application note for more information.

Correct,  there are no body diodes in GaN HEMTs, GaN HEMTs freewheel current during deadtime.  In reverse conduction mode with Vgs < Vth, the drain of the GaN will behave as a source, while the source will behave as a drain. When Vgs>Vth, the GaN will be fully turned on like a Si MOSFET. Please refer to the page 5 of GN001 Application Note for more information.

No. All these devices mentioned in the webinar are HEMTs – unipolar devices.

Yes, the bandwidth of Rogowski coil is only 30MHz. If there is some high frequency oscillation, the measurement will miss some details. However, it is good enough to tell if there is abnormal beheviour on the switching waveforms. We compared with 2GHz current shunt SDN-414-10, and the measured waveforms were close enough.

Yes. i_DS is measured by Rogowski coil ( CWTUM/1/B  ). V_DS is measured by isolated probe ( THDP0200 ). The V_GS_L is measured by non-isolated probe TPP1000 with MMCX connectors. Please refer to page 14 of this Layout webinar for more information on the test setup.

We suggest using the high-side driver to turn off the high-side switches to emulate the conditions the power stage will see in the system.

During the switching-on transition, the di/dt of Ids will cause a voltage drop on Vds ( L*di/dt ). We adjust the deskew of probes by matching the start of di/dt of ids and the beginning of the Vds voltage plateau.

We only use Q3D for qualitative analysis.

Download the Presentation from this Webinar

    Speaker: Juncheng (Lucas) Lu

    Applications Engineering Manager at GaN Systems

    Juncheng Lu received a B.S. degree from Zhejiang University, Hangzhou, China, and M.S. degree from Kettering University, Michigan, USA. He was a research engineer with Delta Power Electronics Center, Shanghai, China since 2011. Since 2016, he has been with GaN Systems, Inc., Ottawa, Canada. His research interest is wide bandgap devices application, power electronics packaging, high power density power supply, and electric vehicle battery charger. He published more than 20 IEEE/SAE transaction and conference papers and holds 10 U.S. patents / 3 U.S. patents pending.

    Moderator: Paul Wiener

    VP Strategic Marketing at GaN Systems

    Paul Wiener is GaN Systems’ Vice President of Strategic Marketing. Prior to joining GaN Systems, Paul led the power magnetics business unit at Eaton. Paul brings more than 25 years’ experience in operations, sales and marketing, and business development. His experience includes vice president of sales at Fultec Semiconductor Inc. and several management roles at Genoa, BroadLogic, and Raychem.