WEBINAR: The Effect of Dynamic On-State Resistance to System Losses in GaN-based Hard-Switching Applications

With Ruoyu (Roy) Hou, Power Electronics Application Engineer at GaN Systems Inc.

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GaN power transistors are the building blocks of change for the design of a new generation of smaller, lower cost, more efficient power systems – free from the limitations of yesterday’s silicon.

Over the past several years, power engineers have demonstrated that systems designed with GaN power transistors exhibit high efficiency and power density due to GaN’s superior switching performance. One characteristic that continues to draw attention from academia and industry is dynamic RDS(on) performance of GaN devices.

In this webinar, the following topics are discussed:

  • The testing methods suggested to establish GaN’s reliability and effective.
  • Quantitative analysis of RDS(on)
  • Conduction loss equation based on two factors kTj and kdr is analyzed
  • A system-level loss breakdown is conducted to show the percentages of each loss mechanism for GaN power transistors
  • Conclusion: Dynamic RDS(on) is not a significant loss factor in power system design.

Questions and Answers

One of the most common misconceptions about Dynamic RDS(on) is that it’s a high frequency problem. In fact, the opposite is true, as Dynamic RDS(on) contributes to conduction loss, not switching loss. As such, as frequencies go higher, the conduction period is less and the Dynamic RDS(on) has a smaller and smaller effect.

From this presentation, it has been proven that the dynamic RDS(on) loss is temperature independent, and it only takes a small portion in the total system losses. For higher power, a higher current GaN device can be applied and the loss percentage will be similar.

Soak time is used in pulsed test conditions and is meant to emulate the OFF time in a switching period. A 5us soak time for instance, would emulate a 100kHz switching frequency at 50% duty cycle. This paper shows that testing methods that “soak” the device for 2 seconds are not reflecting a realistic solution and cause false readings. To see the true measure of Dynamic RDS(on), we recommend a continuous operation test in your normal application.

It’s a common mis-conception from years of early GaN work. However, GaN has exceptional high frequency performance demonstrated by very low Eon and Eoff data, and exceptional conduction losses. However, the conduction losses do have additional Dynamic RDS(on) losses, which are quite small as we’ve shown today. As an absolute value, the Dynamic RDS(on) losses are lowest at lower frequencies. As a percentage, Dynamic RDS(on) losses are also low, but are higher at low frequencies.

In the first years of GaN (10-15 years ago), the dynamic RDS(on) could be so bad that it could enter a Runaway scenario, where the additional losses could grow by 200-500% losses. This was a runaway situation where the losses, dominated by the collapse of the GaN 2-DEG channel, was “collapsing”. These problems have been solved by almost all commercial GaN companies. There is no more “current collapse.”

The truth is simple:

  • We’ve measured our Dynamic RDS(on) as well as our competitors: All have some degree of Dynamic RDS(on). By the way, SiC also has some Dynamic RDS(on), but they don’t like to talk about it.
  • GaN Systems made tradeoffs across all parameters, and although our dynamic RDS(on) is slightly higher than competitors, our total performance is extremely good and much better than competitors.
  • As you can tell by the data we presented tonight, Dynamic RDS(on) in real world applications are a very small contributor to losses while Eon and Eoff are very high. GaN Systems crafted our devices for a perfect low loss solution with very low Eon and Eoff performance, at the cost of Dynamic RDS(on) losses. In the end, we’re more efficient regardless

We’ve also shown in this paper/webinar that many of the studies before us indicated that Gan Systems Dynamic RDS(on) was very high – 80% or so. We’ve shown that most made the mistake of confusing Thermal changes with Dynamic RDS(on) changes. We’ve taken extreme care to separate thermal impact from Dynamic RDS(on) impact in this study. The results show that the total impact is extremely small.

Yes, a deadtime between S3 and S4 is needed to prevent shoot-through. The deadtime can be about 100-150ns.

The soak time is the time duration have the high-voltage on the device. For example, if a switching frequency is 100kHz with 50% duty cycle, the stress time/soak time is 5us.

The Kdr is a constant value at different temperatures. It increases a bit and then plateaus quickly with voltage and turn-on current for hard-switching.

For an apple-to-apple comparison, the operating conditions are kept the same for all the technologies (output power, voltage, and thermal, etc). Due to Si and SiC having higher losses, the junction temp is higher compared to GaN. If we force the same Tj, the output power rating for Si and SiC will be lower, compared to GaN.

It is not one number, there is a range throughout the product family. However, as a portion of total losses, it is very small. From that perspective, it is a very small number.

Use a clamping circuit and measure the RDS(on) value in a continuously running system.

GaN Systems does provide PLECS models. They have IV curves for the conduction loss and Eon/Eoff data for the switching loss. The dynamic RDS(on) is not considered in the current version of PLECS model, as the loss is relatively small.

Allow holes on the PCB for temperature measurement by using a thermal camera. And the monitored temp will be very close the final junction temperature.

We have customers using the devices up to 50MHz without issue.

For Si MOSFETs, the reverse recovery loss is so high that you can not use it in the hard-switching application with high frequency. Therefore, a fast recovery diode is applied on the high-side to reduce the reverse recovery loss on the low-side.

The difference is less than 1 degree C.

Please refer paper below on the hard-switching loss compared with Si MOSFET. R. Hou, J. Lu, and D. Chen, “Parasitic capacitance Eqoss loss mechanism, calculation, and measurement in hard-switching for GaN HEMTs,” in Proc. 2018 IEEE APEC, San Antonio, TX, Mar. 2018. Also, we also provide PLECS model to help you understand and calculate the loss for GaN-based systems.

GaN power transistors are a better choice than SiC MOSFETs even when soft switching techniques are used. This is because soft-switching occurs in a conditional steady-state. Outside of that conditional steady-state, hard switching will occur, where the advantages of GaN are distinguished. Also, the price and supply issues with SiC MOSFETs make GaN a preferred choice in all applications less than 800V.

For most GaN-based application, the switching frequency range is from few KHz to MHz level. Therefore, the soak/stress time is typically less than 500uS. This indicates that the dynamic RDS(on) is not affected by the switching frequency.

For GaN Systems E-HEMTs, Dynamic RDS(on) peaks around 350V-400V and then declines as Vinput goes higher. Our presentation focused on 400V as the most common bus voltage, Dynamic RDS(on) is lower at higher voltages. Our devices are rated to 650V and can be used at 480V and above, as long as the peak voltage is managed.

The device on the soak time control phase leg can be any type of device. It doesn’t impact the test results.

One of the most common misconceptions about Dynamic RDS(on) is that it’s a high frequency problem. In fact, the opposite is true, as Dynamic RDS(on) contributes to conduction loss, not switching loss. As such, as frequencies go higher, the conduction period is less and the Dynamic RDS(on) has a smaller and smaller effect.

No, the dynamic RDS(on) is not dependent on the PCB layout.

GaN Webinar Playback - Dynamic Rds(on) Effect on Total System Losses

Download the Presentation from this Webinar

Speaker: Ruoyu (Roy) Hou

Power Electronics Application Engineer, GaN Systems Inc.

Dr. Ruoyu (Roy) Hou is a Power Electronics Application Engineer at GaN Systems Inc. He received his M.S. degree from the Illinois Institute of Technology, Chicago, IL, USA and his Ph.D. degree from the McMaster University, Hamilton, ON, Canada, both in electrical engineering.

Formerly an electrical engineer with GE Transportation, Dr. Hou was a post-doctoral research fellow at McMaster Automotive Resource Centre (MARC), a Canada-based Excellence Research Center. His interests include power electronics, modeling and loss analysis of wide-bandgap (WBG) semiconductor devices, and GaN-based high-power converter and its magnetic design.

Dr. Hou was a recipient of the ECCE Best Paper Award in 2016 and a co-recipient of the Chrysler Innovation Award for the Automotive Partnership Canada (APC) project in 2014.

Moderator: Jason Lomberg

North American Editor, Power Systems Design

Jason Lomberg has been in the industry for nearly a decade. Prior to joining Power Systems Design as their North American Editor, Jason was the Digital Editor at Electronic Component News for seven years. He’s also written freelance for a variety of publications.

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